
Si5040
Rev. 1.3 71
Reset settings = undefined
Reset settings = undefined
Register 52. RxtpChkErrCnt (MSB of a 40-bit Register)
Bit D39 D38 D37 D36 D35 D34 D33 D32
Name RxtpChkErrCnt[39:32]
Type R
Bit Name Function
7:0 RxtpChkErrCnt[39:32] Receiver Test Pattern Checker Error Count.
When using a defined timebase, this register holds the error count from the last
completed timebase. In the continuous timebase setting, the register holds the
current running error count. Reading the least significant byte latches the upper
bytes.
Note: Combined registers 48 to 52,
0000000000 = 0 (decimal)
FFFFFFFFFF = 2
40
– 1 (decimal)
Register 53. RxtpChkErr
BitD7D6D5D4D3D2D1D0
Name RxtpChkErr[7:0]
Type R
Bit Name Function
7:0 RxtpChkErr[7:0] Receiver Test Pattern Checker Error.
Measured error count in 8-bit floating point notation. The contents of this register are an
alternative format to the RxtpChkErrCnt.
Mantissa = bits [7:4]
Exponent = bits [3:0]
Error count = (Mantissa/16) x 16
Exponent
0000 0000 = 0 (decimal)
1111 1111 = (15/16) x 16
15
(decimal)
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